1. Field of the Disclosure
Aspects of the present disclosure relate generally to semiconductor power devices, and more particularly, to a power MOSFET with an integrated Accumulation/inversion channel FET and a method of fabricating the same.
2. Description of the Prior Art
Semiconductor devices are frequently used to switch currents in power electronic circuits. One common type of switching devices, for example, is the power MOSFET (metal oxide field effect transistor). Power MOSFETs have been used as synchronous rectifiers to significant improve conduction losses in applications such as DC-DC buck converters or synchronous rectifiers. A conventional buck converter, for example, has a high-side MOSFET as control MOSFET and a low-side MOSFET as synchronous MOSFET. The low-side MOSFET works as a synchronous rectifier because its on-time interval is synchronized to with the body diode conduction time. Generally, the high-side MOSFET is turned on when the low-side MOSFET is turned off and vice-versa. The low-side MOSFET conducts current in its third quadrant (VDS<0, ID<0) during the off times of the high-side MOSFET as the load current flows from source to drain.
When the buck converter operates at high speed, a shoot through condition occurs when both the high side and low side MOSFETs are turned on at the same time, causing a shoot through current to flow between the input terminal and the ground terminal. The shoot through condition results in excessive dissipation and efficiency loss. In order to avoid the shoot through problem, a dead time period is provided between the time when the high side MOSFET is turned off and the time when the low side MOSFET is turned on to prevent the high side and low side MOSFETs from turning on simultaneously.
Each of the high side and low side MOSFETs with a normal source-body short contains an intrinsic body diode at the junction between its drain and body regions. During the dead time periods, the inductor current flows through the lower MOSFET's body diode and develops stored charge in the depletion region. This stored charge must be swept out to allow the body diode to recover its forward-blocking characteristic. This body diode usually has a very slow reverse recovery characteristic that can adversely affect the converter's efficiency. Thus, it is desirable to have a diode with low forward bias voltage.
Power MOSFETs that implement P-N junction diodes exhibit several undesirable characteristics, which include: large forward conduction loss, storage of charge between body-epitaxial junction when operating in forward bias, excess stored minority charges which cause large recovery currents and voltage overshoots when the power MOSFET is switched from forward bias to reverse bias, generation of radio frequency interference during fast switching. All of these characteristics cause unnecessary stress to the device, leading to sub-optimal performance.
Schottky diodes have been used to replace P-N junction diodes in many applications, including in power MOSFETs (i.e., MOSFET with body diode in parallel with source and drain). Schottky diodes exhibit several desirable characteristics which make them preferable over P-N diodes, particularly in a power MOSFET configuration. The low forward drop of the Schottky diode during forward conduction reduces power dissipation of the device and leads to lower conduction loss. The conduction of the Schottky is carried out by majority carriers, so minority carrier charge storage effects do not occur during switching of the device. As such, the Schottky diode is preferred in power MOSFET configurations.
As applications of power MOSFETs employing Schottky diodes become more widespread, it becomes even more important to improve the device configuration to reduce productions costs. One particular important consideration is the reduction of surface areas on the semiconductor substrate occupied by the Schottky diodes. Reduction of surface-area utilization of Schottky diodes provides a key to reducing the manufacturing costs and further miniaturizing the size and shape of electronic devices to achieve portability and other functional enhancements.
Therefore, a need still exists in the art of power semiconductor device design and manufacture to provide new device configurations and manufacturing method in integrating 3rd quadrant conduction structure in a MOSFET device.
It is within this context that aspects of the present disclosure arise.